I truely believe that RISC-V is in the process of turning the computing world on it’s head… the combo of open source design and easily grokkable instruction set is a killer combo. I grew up with ARM processors (I had an Acorn 410 as a kid and a BBC B before that), but I do think it’s time that it lost it’s crown.
In the last few years, we’ve seen an explosion of RISC-V CPU designs, especially on FPGA. Thankfully, RISC-V is also ideal for assembly programming with its compact, easy-to-learn instruction set. This mini-series will help you learn and understand 32-bit RISC-V instructions (RV32) and the RISC-V ABI. The first part covers register addition, subtraction, logical operations, shifts, and the often overlooked set instructions.
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